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Avago-technologies LSI53C896 manuály

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Avago technologies LSI53C896 Uživatelský manuál (366 strany)


Značka: Avago-technologies | Kategorie: Hardware | Velikost: 3.16 MB |

 

Tabulka s obsahem

September 2003

1

Version 3.3

1

Preface iii

3

Revision Record

5

Contents

7

Contents ix

9

Chapter 1

19

Introduction

19

1-2 Introduction

20

General Description 1-3

21

1.2 Benefits of Ultra2 SCSI

22

1.4 TolerANT

23

Technology

23

1.5 LSI53C896 Benefits Summary

24

1.5.2 PCI Performance

25

1.5.3 Integration

26

1.5.4 Ease of Use

26

1.5.5 Flexibility

27

1.5.6 Reliability

28

1.5.7 Testability

28

Chapter 2

29

Functional Description

29

2-2 Functional Description

30

2.1.1 PCI Addressing

31

2-4 Functional Description

32

2-6 Functional Description

34

2-8 Functional Description

36

2-10 Functional Description

38

2.1.3 Internal Arbiter

39

2.1.4 PCI Cache Mode

39

2-12 Functional Description

40

2.1.4.5 Examples

43

2.2.1 SCRIPTS Processor

48

2.2.2 Internal SCRIPTS RAM

49

2-22 Functional Description

50

2-24 Functional Description

52

2.2.8 Load/Store Instructions

53

2.2.10 SCSI Loopback Mode

54

2.2.11 Parity Options

55

Table 2.4 SCSI Parity Control

57

2-30 Functional Description

58

2.2.12 DMA FIFO

59

2.2.13 Data Paths

60

Counter, which

61

2-34 Functional Description

62

2.2.14 SCSI Bus Interface

63

LSI53C8XX

65

SN75976A2

65

2.2.16 Synchronous Operation

68

2-42 Functional Description

70

2.2.17 Interrupt Handling

71

2-44 Functional Description

72

2-46 Functional Description

74

2-48 Functional Description

76

2.2.18 Interrupt Routing

78

2.2.19 Chained Block Moves

80

2-54 Functional Description

82

2.3 Parallel ROM Interface

83

2.4 Serial EEPROM Interface

85

2.5 Power Management

86

2.5.1 Power State D0

87

2.5.2 Power State D1

87

2.5.3 Power State D2

88

2.5.4 Power State D3

88

Chapter 3

89

Signal Descriptions

89

3-2 Signal Descriptions

90

3.2 PCI Bus Interface Signals

93

3.2.4 Arbitration Signals

96

3.2.5 Error Reporting Signals

97

3.2.6 Interrupt Signals

98

3.3.1 SCSI Function A Signals

101

Signals group

103

3.3.2 SCSI Function B Signals

104

3.5 Test Interface Signals

108

3.6 Power and Ground Signals

109

3.7 MAD Bus Programming

110

3-24 Signal Descriptions

112

Chapter 4

113

Registers

113

Registers:0x00–0x01

114

Registers:0x02–0x03

115

Registers:0x04–0x05

115

4-4 Registers

116

Registers:0x06–0x07

117

Register: 0x08

118

Registers:0x09–0x0B

119

Register: 0x0C

119

Register: 0x0D

120

Register: 0x0E

120

Register: 0x0F

121

Registers:0x10–0x13

121

Registers:0x14–0x1B

121

Registers:0x1C–0x23

122

Registers:0x24–0x27

122

Registers:0x28–0x2B

122

Registers:0x2C–0x2D

123

Registers:0x2E–0x2F

124

Registers:0x30–0x33

125

Register: 0x34

126

Registers:0x35–0x3B

126

Register: 0x3C

126

Register: 0x3D

127

Register: 0x3E

127

Register: 0x3F

128

Register: 0x40

128

Register: 0x41

128

Registers:0x42–0x43

129

Registers:0x44–0x45

130

4.2 SCSI Registers

131

Table 4.2 SCSI Register Map

132

Register: 0x00

133

4-22 Registers

134

SCSI Registers 4-23

135

Register: 0x01

136

SCSI Registers 4-25

137

4-26 Registers

138

Register: 0x02

139

4-28 Registers

140

SCSI Registers 4-29

141

Register: 0x03

142

Register: 0x04

144

Register: 0x05

145

Register: 0x06

149

Register: 0x07

149

Register: 0x09

151

Register: 0x0A

152

Register: 0x0B

153

4-42 Registers

154

SCSI Registers 4-43

155

SCSI Registers 4-45

157

SCSI Registers 4-49

161

Register: 0x14

162

SCSI Registers 4-51

163

4-52 Registers

164

Register: 0x15

165

Register: 0x16

166

Register: 0x17

167

Register: 0x18

167

Register: 0x19

168

Register: 0x1A

168

SCSI Registers 4-57

169

Register: 0x1B

170

Registers:0x1C–0x1F

171

Register: 0x20

172

Register: 0x21

173

Register: 0x22

175

Register: 0x23

176

Registers:0x24–0x26

177

Register: 0x27

178

Registers:0x2C–0x2F

179

Registers:0x34–0x37

180

Register: 0x38

180

4-70 Registers

182

Register: 0x39

183

Register: 0x3A

184

Register: 0x3B

184

SCSI Registers 4-73

185

4-74 Registers

186

Registers:0x3C–0x3F

187

SCSI Registers 4-77

189

Register: 0x42

191

4-80 Registers

192

SCSI Registers 4-81

193

Register: 0x43

194

Register: 0x44

195

Register: 0x45

196

Register: 0x46

197

Register: 0x47

197

4-86 Registers

198

Register: 0x48

199

Register: 0x49

200

Register: 0x4A

203

Register: 0x4B

203

Register: 0x4C

204

Register: 0x4D

205

Register: 0x4E

207

4-96 Registers

208

Register: 0x4F

209

4-98 Registers

210

Registers:0x50–0x51

211

Register: 0x52

212

Register: 0x53

212

Registers:0x54–0x55

213

Register: 0x56

213

4-102 Registers

214

Register: 0x57

215

4-104 Registers

216

Registers:0x58–0x59

217

Registers:0x5A–0x5B

217

Registers:0x5C–0x5F

218

Registers:0x60–0x9F

218

4.3 64-Bit SCRIPTS Selectors

219

Registers:0xA4–0xA7

220

Registers:0xA8–0xAB

220

Registers:0xAC–0xAF

221

Registers:0xB0–0xB3

221

Registers:0xB4–0xB7

222

Registers:0xB8–0xBB

222

Registers:0xBC–0xBF

222

Registers:0xC0–0xC3

223

Registers:0xC4–0xC7

223

Registers:0xC8–0xCB

224

Registers:0xCC–0xCF

225

Registers:0xD0–0xD3

226

Registers:0xD4–0xD7

226

Registers:0xD8–0xDA

227

Register: 0xDB

227

Registers:0xDC–0xDF

228

Registers:0xE0–0xFF

228

Chapter 5

229

SCSI SCRIPTS Instruction Set

229

5.1 SCSI SCRIPTS

230

SCSI SCRIPTS 5-3

231

5.2 Block Move Instructions

233

Block Move Instructions 5-7

235

Command Not Used

235

Don’t Care Table Offset

235

00 Byte Count

236

Physical Data Address

236

OPC Opcode 27

238

Target Mode

238

Block Move Instructions 5-11

239

OPC Instruction Defined

240

0 CHMOV/CHMOV64

240

1 MOVE/MOVE64

240

5.2.2 Second Dword

242

5.2.3 Third Dword

242

5.3 I/O Instructions

243

I/O Instructions 5-19

247

Absolute Alternate Address

248

I/O Instructions 5-21

249

Command Table Offset

249

Absolute Jump Offset

249

5.3.2 Second Dword

250

5.4 Read/Write Instructions

251

5.4.2 Second Dword

252

5.5.1 First Dword

255

from the current

258

(using addition or

259

5.5.2 Second Dword

261

5.5.3 Third Dword

261

5.6 Memory Move Instructions

262

5.6.1 First Dword

263

5.6.3 Second Dword

264

5.7 Load/Store Instructions

265

5.7.1 First Dword

266

Load/Store Instructions 5-39

267

5.7.2 Second Dword

268

Chapter 6

269

Specifications

269

Figure 6.1 LVD Driver

271

Figure 6.2 LVD Receiver

272

Table 6.6 Input Capacitance

272

GPIO4, MAD[7:0]

273

, MWE/, TDO

273

TEST_HSC

274

, TEST_RST/, TMS

274

6-10 Specifications

278

6.3 AC Characteristics

279

Figure 6.8 External Clock

280

Table 6.14 External Clock

280

Figure 6.9 Reset Input

281

Table 6.15 Reset Input

281

• Target Timing

282

6.4.1 Target Timing

283

6.4.2 Initiator Timing

290

(Addr drvn by LSI53C896;

301

6.4.3 External Memory Timing

306

6-40 Specifications

308

Master-Addr;

309

(Driven by Master-Addr;

309

Data Driven by Memory)

309

6-42 Specifications

310

6-44 Specifications

312

(Addr driven by LSI53C896;

315

6-50 Specifications

318

(Addr Driven by LSI53C896

319

6-52 Specifications

320

(Addr driven by LSI53C896

323

(Driven by LSI53C896)

325

6.5 SCSI Timing Diagrams

328

6.6 Package Drawings

335

6-70 Specifications

338

Package Drawings 6-71

339

6-72 Specifications

340

Appendix A

341

Register Summary

341

A-6 Register Summary

346

Appendix B

347

External Memory Interface

347

Diagram Examples

347

MAD[2:0]

350

IX-2 Index

352

Index IX-3

353

Numerics

354

Index IX-5

355

IX-6 Index

356

Index IX-7

357

IX-8 Index

358

Index IX-9

359

IX-10 Index

360

Index IX-11

361

IX-12 Index

362

Index IX-13

363

IX-14 Index

364

Customer Feedback

365




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